N O R C H I P 2 0 0 8 """"""""""""""""""""""""""" Tallinn, Estonia 17-18 November 2008 Technically co-sponsored by: CONFERENCE SECRETARIAT Technoconsult ApS Agern Allé 3, DK-2970 Hoersholm Tel: +45 2212 5244 / Fax: +45 4576 5708 E-mail: info@norchip.org MONDAY 17 NOVEMBER 2008 09.00 Opening and welcome Peeter Ellervee, Tallinn University of Technology (EE) 09.15 Invited talk: Learning from the primary visual cortex to recover vision for the blind by microstimulation Mohamad Sawan, École Polytechnique de Montréal (CA) 1.1 Gate Design CHAIR: Tor S. Lande, University of Oslo 10.00 Using Positive Feedback Adiabatic Logic to implement Reversible Toffoli Gates David J. Willingham et al, University of Westminster (UK) 10.20 A Subthreshold SCL Based Pipelined Encoder for Ultra-Low Power 8-bit Folding/Interpolating ADC Mohammad Beikahmadi et al, EPFL (CH) 1.2 Reliable Design Systems CHAIR: Peeter Ellervee, Tallinn Univ. of Technology 10.00 Subthreshold AES S-Box with Increased Power Analysis Resistance Håvard Pedersen Alstad et al, University of Oslo (NO) 10.20 Power-Aware Reliable Embedded Software Design Fabian Vargas et al, Catholic University – PUCRS (BR) 10.40 Coffee 2.1 Amplifiers – I CHAIR: Mohammed Ismail, Royal Inst. of Technology Dan Sandström et al, Helsinki Univ. of Technology (FI) 11.10 60-GHz Amplifier Employing Slow-wave Transmission Lines in 65-nm CMOS ......................... 11.30 A 90nm CMOS UWB LNA Andreas Axholt et al, Lund University (SE) 11.50 A 130nm CMOS Programmable Operational Amplifier Jakob M. Tomasik et al, Hamburg Univ. of Technology (DE) 2.2 Design Verification and Optimization CHAIR: Jaan Raik, Tallinn Univ. of Technology 11.10 Automatic Verification Plan Generation to Speed up SoC Verification Christoph Michael Kirchsteiger et al, Inst. For Technical Informatics (AT) 11.30 Survival of an object oriented simulation framework through SystemC version upgrades Pasi Yliuntinen et al, University of Turku (FI) 11.50 An Exact Breadth-First Search Algorithm for the Multiple Constant Multiplications Problem Levent Aksoy et al, Istanbul Technical University (TR) 12.10 Lunch 13.30 Invited talk 2: Embedded signal processing in Impedance spectroscopy Mart Min, Tallinn Univ. of Technology (EE) 3.1 Amplifiers - II CHAIR: Kari Halonen, Helsinki Univ. of Technology 14.15 A 72.2Mbit/s Transformer-Based Power Amplifier in 65nm CMOS for 2.4GHz 802.11n WLAN Jonas Fritzin et al, Linköping University (SE) 14.35 An Automatic Gain Control Front-End Optical Receiver for Multi-Level Data Transmission Mohamed Atef Abdelaal et al, Vienna University of Technology (AT) 3.2 Digital Design CHAIR: Viktor Öwall, Lund University 14.15 Partial Reconfiguration Applied in an On-line Evolvable Pattern Recognition System Jim Torresen et al, University of Oslo (NO) 14.35 Hardware Comparison of the Hash Function Candidates RADIOGATÚN, MAME, and LAKE Luca Henzen et al, ETH Zurich (CH) 4. Poster Session I 14.55 Coffee / Poster session: Transient Properties of Internal State Initialization Strategies in Reconfigurable Digital Signal Processing Channels Tamás Kovácsházy et al, Budapest University of Technology and Economics (HU) Switched Capacitor Sample-and-Hold Circuit with Input Signal Range beyond Supply Voltage Francesco Centurelli et al, Univ. of Rome (IT) Low-Voltage, Low-Power, and Wide-Tuning-Range Ring-VCO for Frequency .S Modulator Tuan-Vu Cao et al, University of Oslo (NO) A 20MS/s 11-bit Digital-to-Analog Converter using a Combined Capacitor and Resistor Network Milos Davidovic et al, Vienna University of Technology (AT) On-line Distributed Thermal Sensing and Monitoring of Multicore Systems Kameswar Rao Vaddina et al, University of Turku (FI) CMOS Temperature Sensor Using Periodic Averaging for Error Reduction Mikail Yucetas et al, Helsinki Univ. Of Technology (FI) Fault Tolerant Hardware Implementation of Neural Networks Ali Ahmadi et al, Tehran University (IR) Low-Cost Fault-Tolerance in EvoMP Multiprocessor System Shervin Vakili et al, University of Tehran (IR) Efficient Methodology for Boundary Scan Insertion and Pattern Generation for MCM Based Designs P. Soma Shekar et al, Tessolve Services Pvt. Microprocessor-based System Test using Debug Interface Sergei Devadze et al, Tallinn Technical University (EE) Application of Sequential Test Set Compaction to LFSR Reseeding Igor Aleksejev et al, Tallinn Technical University (EE) Comparison of Fixed-Point Arithmetic Errors for the FPGA-Based CRAIMOT Basis Function Generators Maris Terauds et al, Riga Technical Univ. (LV) 5.1 Filters and Mixers CHAIR: Henrik Sjöland, Lund University 16.00 Bi-directional Band pass / Band stop filter ased on Current-Starved Pseudo Floating-Gate. Nverters Mehdi Azadmehr et al, University of Oslo (NO) 16.20 Low-Voltage Bulk-Driven Mixers in 45nm CMOS for Ultra-Wideband TX and RX Oliver Schmitz et al, Leibniz Universität Hannover (DE) 16.40 A 30 GHz 90-nm CMOS Passive Subharmonic Mixer with 15 GHz Differential LO Johan Wernehag et al, Lund University (SE) 5.2 Digital Signal Processing CHAIR: Alberto Nannarelli, Techn. Univ. of Denmark 16.00 Parameterized MAC unit generation for a scalable embedded DSP Core Volker Gierenz et al, Catena Radio Design (NL) 16.20 Processing Element for Reciprocal and Reciprocal Square Root Aki Happonen et al, Nokia Devices R&D (FI) 16.40 A Variable-Rate Viterbi Decoder in 130-nm CMOS Matthias Kamuf et al, Lund University (SE) 19.00 Dinner TUESDAY 18 NOVEMBER 2008 09.00 Invited talk 3: Future RFID and wireless sensor for ubiquitous intelligence Lirong Zheng, Royal Inst. of Technology (SE) 6.1 Power Supply CHAIR: T.b.d. 09.45 CMOS Integrated Active Rectifier with Temperature Independent Efficiency Christian Peters et al, Univ. of Freiburg (DE) 10.05 Power Harvesting Circuits in 90 nm CMOS Trygve K. Halvorsen et al, University of Oslo (NO) 6.2 Software Defined Radio CHAIR: Svante Signell, Royal Inst. of Technology 09.45 Non-Data Aided Carrier Offset Compensation for SDR Implementation Anders Riis Jensen et al, Aalborg University (DK) 10.05 Divide-and-Conquer Matrix Inversion for Linear MMSE Detection in SDR MIMO Receivers Stefan Eberli et al, ETH Zurich (CH) 7. Poster session II 10.25 Coffee / Poster session: An Integrated 3-Level Fully Adjustable PWM Class-D Audio Amplifier in 0.35µm CMOS Jonas Lindstrand et al, Lund University (SE) A 1W Class-D Audio Power Amplifier in a 0.35um CMOS Process Kin-Keung Lee et al, Lund University (SE) Integrated 1.6 GHz, 2W Tuned RF Power Amplifier Simo S. Hietakangas et al, Oulu University (FI) A Switchable Folded-Cascode OTA without Transmission Gates in the Signal Path Fabian Henrici et al, Univ. of Freiburg (DE) Low Noise Amplifier Architecture Analysis for OFDM-UWB System in 0.18µm CMOS Peng Wang et al, Royal Inst. of Technology (SE) Instruction Set Enhancements for High-Performance Multicore Execution on the REALJava Platform Joonas Tyystjärvi et al, University of Turku (FI) A system for calculating the Greatest Common Denominator implemented using Asynchrobatic Logic David J. Willingham et al, University of Westminster (UK) High Level Synthesis of Parallel Tile Processing Units with non-uniform memory accesses Rosilde Corvino et al, CNRS (FR) Hierarchical Agent Monitoring NoCs: A Design Methodology with Scalability and Variability Wei Yin et al, University of Turku (FI) QoS Router with Both Soft and Hard Guarantee for Network-on-chip Xiaowen Wu et al, Harbin Institute of Technology (CN) Stochastic Automata Network for Performance Evaluation of Heterogeneous SoC Communication Ulhas Deshmukh et al, Malaviya National Institute of Technology (IN) 8.1 Generators CHAIR: Erik Bruun, Technical University of Denmark 11.10 Noise and Jitter Transfer Characteristics of an On-chip Voltage Reference-Locked Loop Ilkka Kristian Nissinen et al, Univ. of Oulu (FI) 11.30 Investigation of First-Order Digital Bang-Bang Phase-Locked Loops with Reference Clock Jitter Stefan Tertinek et al, Univ. College Dublin (IR) 11.50 A 5.4GHz 90-nm CMOS Digitally Controlled LC Oscillator with 21% Tuning Range, 1.1MHz resolution, and 180dB FOM Ping Lu et al, Lund University (SE) 8.2 Network-on-Chip CHAIR: Gert Jervan, Tallinn Univ. of Technology 11.10 Low-latency and Energy-efficient Monitoring Interconnect for Hierarchical-agent-monitored NoCs Liang Guang et al, Turku University (FI) 11.30 Distributed Traffic Monitoring Methods for Adaptive Network-on-Chip Ville Rantala et al, University of Turku (FI) 11.50 High Throughput High Performance NoC Switch Mohamed A. Abd El ghany et al, German University in Cairo (EG) 12.10 Lunch 13.10 Invited talk 4: Physical design automation at transistor level Ricardo Reis, Universidade Federal do Rio Grande do Sul (BR) 9.1 Analog Design CHAIR: Trond Ytterdal, NTNU 13.55 Design and behavioral simulation of comparator based switched-capacitor circuits Carsten Wulff et al, NTNU (NO) 14.15 NETTAN - A tool for Analysis and Iterative Design of Analog-, Digital- and Switched-Capacitor Filters Svante Signell, Royal Inst. of Technology (SE) 14.35 Analog Circuit Calibration with Single Poly Non-Volatile Memories Kristian M. Hafkemeyer et al, Hamburg University of Technology (DE) 14.55 Net Balanced Floorplanning Based on Elastic Energy Model Wei Liu et al, Technical Univ. of Denmark (DK) 9.2 ADCs CHAIR: Markku Åberg, VTT 13.55 A 2.5-GS/s 30-mW 4-bit Flash ADC in 90nm CMOS Timmy Sundström et al, Linköping University (SE) 14.15 4-bit, 15 GS/s ADC in SiGe Yevgen Borokhovych et al, IHP (DE) 14.35 Towards a Second Order FDSM Analog-to-Digital Converter for Wireless Sensor Network Nodes Jørgen Andreas Michaelsen et al, University of Oslo (NO) 14.55 A Power-Adaptable Entropy-Coding A/D Converter Nashwa Abo Elneel et al, Hamburg University of Technology (DE) 15.15 Closing remarks and NORCHIP 2009 SESSION ORGANISATION Both oral and poster presentations have been carefully selected through a regular review process and they will all appear in the proceedings. Equal quality measures have been applied to posters and lectures. Papers for oral presentation are selected based on thematic composition of sessions. PROCEEDINGS USB stick proceedings of the conference contributions will be distributed upon registration. Each participant will receive a copy of the proceedings. Proceedings and all presentations will be in English. BEST ANALOG PAPERS The Management Committee has since 1992 made special issues of the Springer International Journal on Analog Integrated Circuits and Signal Processing. Also this year we will publish a number of the best analog papers in the journal. GENERAL SCOPE OF THE CONFERENCE The NORCHIP conference is the main microelectronics event of the Nordic countries. The annual IEEE CAS sponsored conference covers all areas of microelectronics, spanning from large digital systems to simple analog circuits. The wide scope of NORCHIP is intentional promoting cross-field collaboration. NORCHIP is a well established conference with representation from both academia and industry. Papers of the highest scientific and technical quality are presented together with selected invited speakers and preconference tutorial sessions. MANAGEMENT COMMITTEE • Chairman: Tor S. Lande, University of Oslo (NO) • Hannu Tenhunen, Royal Inst. of Technology (SE) • Erik Bruun, Technical University of Denmark (DK) • Kari Halonen, Helsinki Univ. of Technology (FI) • Jan Madsen, Technical University of Denmark (DK) • Lars Wanhammar, Linköping University (SE) • Jari Nurmi, Tampere University of Technology (FI) • Peeter Ellervee, Tallinn University of Technology (EE) TECHNICAL PROGRAMME COMMITTEE All submitted contributions have been reviewed by the following Technical Programme Committee: • Chairman: Peeter Ellervee, Tallinn Univ. of Technology (EE) • Vice Chairman: Gert Jervan, Tallinn Univ. of Technology (EE) • Pietro Andreani, Lund University (SE) • Elmars Bekeris, Riga Technical University (LV) • Mats Brorsson, Royal Inst. of Technology (SE) • Leandro Soares Indrusiak, TU Darmstadt (DE) • Mohammed Ismail, Royal Inst. of Technology (SE) • Jouni Isoaho, University of Turku (FI) • Kjell Jeppson, Chalmers Univ. of Technology (SE) • Artur Jutman, Tallinn University of Technology (EE) • Peter Koch, Aalborg University (DK) • Juha Kostamovaara, Oulu University (FI) • Vello Kukk, Tallinn Univ. of Technology (EE) • Torben Larsen, Aalborg University (DK) • Saska Lindfors, Helsinki Univ. of Technology (FI) • Jan Mikkelsen, Aalborg University (DK) • Yannick Le Moullec, Aalborg University (DK) • Alberto Nannarelli, Technical University of Denmark (DK) • Håkan Olsson, Royal Inst. of Technology (SE) • Juha Plosila, Turku University (FI) • Timo Rahkonen, Oulu University (FI) • Tiberiu Seceleanu, University of Turku (FI) • Rimantas Sheinauskas, Kaunas Univ. of Techn. (LT) • Svante Signell, Royal Inst. of Technology (SE) • Henrik Sjöland, Lund University (SE) • Kalle Tammemäe, Tallinn Univ. of Technology (EE) • Jim Tørresen, University of Oslo (NO) • Raimund Ubar, Tallinn Univ. of Technology (EE) • Olli Vainio, Tampere Univ. of Technology (FI) • Mark Vesterbacka, Linköping University (SE) • Dag Wisland, Novelda (NO) • Trond Ytterdal, NTNU (NO) • Johnny Öberg, Royal Inst. of Technology (SE) • Viktor Öwall, Lund University (SE) • Markku Åberg, VTT Electronics (FI) ORGANISING COMMITTEE • Chairman: Ivan Ring Nielsen, Technoconsult (DK) • Peeter Ellervee, Tallinn Univ. of Technology (EE) • Gert Jervan, Tallinn University of Technology (EE) CONFERENCE VENUE / ACCOMMODATION The conference location is in the heart of Tallinn at: Tallink Spa & Conference Hotel Sadama 11a, EE-10111 Tallinn, Estonia Tel.: +372 630 0808 / Fax: +372 630 0861 REGISTRATION The enclosed registration form must be completed and returned to the Conference Secretariat, together with full payment. The registration fee of EUR 390 includes proceedings, banquette dinner, lunches and coffee breaks. The fee for the tutorial is charged separately. Registration deadline is 3 November. Registrations are acknowledged upon reception. 29.10.2008. Rev. artw. 17.11.2008.